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Increased efficiency in RF-power SOI-LDMOS transistors
University of Gävle, Department of Technology and Built Environment, Ämnesavdelningen för elektronik.
2009 (English)In: EUROSOI 2009 - Conference Proceedings: Fifth Workshop of the Thematic Network on Silicon-On-Insulator, Technology, Devices and Circuits, 2009, 117-118 p.Conference paper, Published paper (Refereed)
Abstract [en]

The effect of substrate resistivity on efficiency in high-power operation of high-frequency SOI-LDMOS transistors is for the first time investigated using computational load-pull simulations. Identical SOI-LDMOS transistors have been studied on different substrate resistivities. Their highpower performance has been compared to previous investigations concerning the off-state ROUT to high-efficiency relation. It is shown that albeit high off-state ROUT is a good indication it may not always be sufficient for high efficiency operation. The bias and frequency dependency of the coupling through the substrate makes a more detailed on-state analysis necessary. It is shown that very low resistivity and high resistivity SOI-substrates both result in high efficiency at the studied frequency and bias-point. It is also shown thata normally doped, medium resistivity, substrate results in significantly lower efficiency.

 

 

 

 

 

 

 

Place, publisher, year, edition, pages
2009. 117-118 p.
Keyword [en]
SOI, Load-Pull, Power Amplifier
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:hig:diva-3690OAI: oai:DiVA.org:hig-3690DiVA: diva2:158858
Available from: 2009-02-04 Created: 2009-02-04 Last updated: 2009-03-31Bibliographically approved

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