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High Efficiency using Optimized SOI-Substrates
University of Gävle, Department of Technology and Built Environment, Ämnesavdelningen för elektronik.
2008 (English)In: Gigahertz Symposium 2008: Abstract Book, Göteborg: Chalmers , 2008, p. 94-94Conference paper, Published paper (Other academic)
Abstract [en]

Abstract—The effect of the substrate resistivity on

the efficiency for high-frequency SOI-LDMOS transistors

is studied using computational load-pull simulations.

It is shown that very low resistivity and

high resistivity SOI-substrates both result in high

efficiency. It is also shown that a normally doped,

medium resistivity, substrate results in significantly

lower efficiency.

Place, publisher, year, edition, pages
Göteborg: Chalmers , 2008. p. 94-94
Series
Technical report ; MC2-125
Keywords [en]
SOI, Efficiency, LDMOS
Identifiers
URN: urn:nbn:se:hig:diva-1662OAI: oai:DiVA.org:hig-1662DiVA, id: diva2:118324
Available from: 2008-04-28 Created: 2008-04-28 Last updated: 2025-10-02Bibliographically approved

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GigaHertz Symposium 2008: Abstract Book

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Bengtsson, Olof

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CiteExportLink to record
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Citation style
  • apa
  • harvard-cite-them-right
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
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Language
  • sv-SE
  • en-GB
  • en-US
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  • nn-NB
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